Senior Director Systems Architect

About Marvell

Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities.

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.

Your Team, Your Impact

What You Can Expect

• Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field.

• 20+ years of experiencein high-speed connectivity, Ethernet PHY, SerDes, optical modules, mixed-signal ICs, or related system architecture roles.

• Demonstrated success leading architecture or applications organizations supporting Tier-1 enterprise, cloud, or hyperscale accounts.

• Deep expertise in high-speed board design, signal integrity, system modeling, and debug methodologies.

• Strong lab and system-level hands-on experience (oscilloscopes, protocol analyzers, traffic generators).

• Proven ability to communicate technical strategy at the executive level and influence both internal and external organizations.

• Strong background in C/C++, Python/TCL scripting, automation frameworks, and system-level diagnostics.

• Experience driving cross-functional teams and managing multiple strategic customer programs.

• Willingness to travel globally.

• Prior leadership of architecture, systems engineering, or applications engineering organizations.

• Experience defining semiconductor product roadmaps or participating in technical standards bodies.

• Background in technical sales strategy, solution architecture, or executive-level customer engagement.

• Experience driving development of next-generation connectivity technologies (e.g., 112G/224G SerDes, emerging PHY standards, optical integration).

What We're Looking For

• Serve as the executive technical authority for high-speed connectivity architectures, guiding global customer strategy and ensuring alignment across Marvell's silicon, firmware, systems, and marketing organizations.

• Define system-level architectures for next-generation PHY/SerDes/retimer solutions and ensure successful deployment across enterprise, cloud, AI, and carrier markets.

• Represent customer technology requirements and long-term trends to Marvell leadership to influence multi-year product and roadmap planning.

• Lead high-level technical engagements with CTO, Chief Architect, and Distinguished Engineer counterparts at global Tier-1 customers.

• Translate complex customer requirements into scalable, manufacturable system architectures utilizing Marvell's connectivity portfolio.

• Oversee architecture reviews, high-speed PCB design guidance, signal integrity strategies, system-level debugging, and executive technical escalations.

• Partner closely with silicon architects, engineering leaders, and product management to influence next-generation PHY and SerDes product definitions, standards participation, and ecosystem strategy.

• Drive architectural assessments of emerging technologies, new interface standards, and market shifts in high-speed connectivity.

• Lead and mentor senior architects, principal engineers, and applications teams globally.

• Establish best practices for system design, customer engagement, and technical collateral development across the organization.

• Scale the architecture function to support rapid growth in high-speed connectivity products.

• Deliver high-impact technical briefings, competitive positioning, and strategic solution proposals to senior customer and partner executives.

• Serve as a key external spokesperson for Marvell in customer meetings, industry forums, and technical summits.

• Develop high-value collateral including architecture guides, white papers, standards contributions, and solution blueprints.

• Work hand-in-hand with silicon development, system validation, firmware, software, and marketing to deliver cohesive solutions across all layers of the technology stack.

• Support customer bring-up, field trials, interoperability testing, and high-volume production ramps.

Expected Base Pay Range (USD)

The successful candidate's starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.

Additional Compensation and Benefit Elements

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at TAOps@marvell.com.

Interview Integrity

As part of our commitment to fair and authentic hiring practices, we ask that candidates do not use AI tools (e.g., transcription apps, real-time answer generators like ChatGPT, CoPilot, or note-taking bots) during interviews.

Our interviews are designed to assess your personal experience, thought process, and communication skills in real-time. If a candidate uses such tools during an interview, they will be disqualified from the hiring process.

This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.